| PART |
Description |
Maker |
| PD46184185BF1-E40-EQ1 PD46184095BF1-E40-EQ1 PD4618 |
18M-BIT DDR II SRAM SEPARATE I/O 2-WORD BURST OPERATION
|
Renesas Electronics Corporation
|
| UPD44325084BF5-E33-FQ1 PD44325084BF5-E50-FQ1-A PD4 |
4M X 8 QDR SRAM, 0.45 ns, PBGA165
36M-BIT QDRTM II SRAM 4-WORD BURST OPERATION
|
Renesas Electronics Corporation
|
| UPD44325364F5-E50-EQ2 UPD44325084 UPD44325084F5-E3 |
36M-BIT QDRII SRAM 4-WORD BURST OPERATION
|
NEC[NEC]
|
| UPD44324182F5-E37-EQ2-A UPD44324362F5-E37-EQ2-A UP |
36M-BIT DDRII SRAM 2-WORD BURST OPERATION 36M条位SRAM2条DDRII字爆发运
|
NEC Corp.
NEC, Corp.
|
| MCM69Q618TQ8R MCM69Q618 MCM69Q618TQ10 MCM69Q618TQ1 |
64K x 18 Bit Synchronous Separate I/O SRAM
|
MOTOROLA[Motorola, Inc]
|
| CY7C1316BV18 CY7C1318BV18 CY7C1916BV18 CY7C1320BV1 |
18-Mbit DDR-II SRAM 2-Word Burst Architecture(2字Burst结构,18-Mbit DDR-II SRAM) 18兆位的DDR - II SRAM字突发架构（2字突发结18 -兆位的DDR - II SRAM的）
18-Mbit DDR-II SRAM 2-Word Burst Architecture(2瀛?urst缁??,18-Mbit DDR-II SRAM)
|
Cypress Semiconductor Corp.
Cypress Semiconductor, Corp.
|
| UPD44164365F5-E60-EQ1 UPD44164085 UPD44164085F5-E4 |
18M-BIT DDRII SRAM SEPARATE I/O 2-WORD BURST OPERATION
|
NEC[NEC]
|
| CY7C1418BV18-278BZC CY7C1418BV18-278BZI CY7C1418BV |
36-Mbit DDR-II SRAM 2-Word Burst Architecture 4M X 8 DDR SRAM, 0.45 ns, PBGA165
|
Cypress Semiconductor Corp.
Cypress Semiconductor, Corp.
|
| GS8182S18GD-167I |
18Mb Burst of 2 DDR SigmaSIO-II SRAM 1M X 18 DDR SRAM, 0.5 ns, PBGA165
|
GSI Technology, Inc.
|
| CY7C1518KV18-300BZXC |
72-Mbit DDR-II SRAM 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 1.7 to 1.9 V 4M X 18 DDR SRAM, 0.45 ns, PBGA165
|
Cypress Semiconductor, Corp.
|
